POSTERS

Information for poster presenters:

 
Poster size: A0 format (width: 841 mm x Height: 1189 mm) (Portrait / Vertical).
Posters Presentation: We recommend the poster presenters to stand in front of their poster in order to enhance fruitful discussions – designated time that the evaluators will pass by to discuss the work.
Posters Schedule: From Tuesday morning (March 24) to Wednesday (March 25) just after the afternoon coffee break
Other info: To each poster will be assigned a number. You will find double side tape directly on the panel to hang your poster.
Check the number assigned to your poster at the entrance of the exhibition and posters hall.
 
 
Posters (16) - Alphabetical order
Poster nº Author & Title Abstract
1 Maurice Clair (3D-Micromac AG, Germany)
Laser-Based Annealing of Nickel Contacts for SiC Devices: Towards Thermally Robust Power Interfaces in 3D-Integration
2 Mathias Franz (Fraunhofer ENAS, Germany)
Atomic Layer Deposition of Titanium Oxide for Integrated Applications
3 Daniel Grieve (Infineon Technologies Dresden AG & Co KG, Germany)
Investigation of the oxidation and reduction behavior of thin copper surfaces in semiconductor technology
4 Conrad Guhl (Fraunhofer IPMS, Germany)
Characterization of interactive forces between CMP pad and ILD materials depending on post CMP clean
Late 1 Matteo Gullo (STMicroelectronics, Italy)
Monitoring-Based Control and Process Interruptions Recovery Strategies for Slurry Residues in Serial CMP of IMD Oxides
5 Sergej Liberda (Fraunhofer IPMS CNT, Germany)
300 mm CMOS Compatible ZrN based SC BEOL Demonstrator & Trench-Array Structures for Testing Via Superconductivity
6 Christian Miersch (Fraunhofer Technology Center High-Performance Materials THM, Germany)
Plasma enhanced Atomic Layer Etching on AlGaN/GaN: process development, stability, recess etching of source, drain and gate
Late 2 Takayuki Ohba (Institute of Science Tokyo, Japan)
Development of a WOW-Compatible Chiplet-Based COW Process
Late 3 Luca Pessina (STMicroelectronics, Italy)
Effect of conditioning downforce on Removal Rate stability for ILD CMP application using a ceria-based slurry
7 Sakshi Pharsole (Fraunhofer Institute for Electronic Nano Systems ENAS, Germany)
Investigation of Au-Si Eutectic Bonding for MEMS Wafer-Level Packaging Application
8 Ilaria Presotto (STMicroeletronics, Italy)
Data-driven resolution of processability issues in technology scale-up
9 Namitha Reghunath (TU Chemnitz, Germany)
Simulation of Metal-Assisted Halogen-Free Etching of Silicon Using Ruthenium Catalyst
Late 4 Simone Rizzardini (STMicroelectronics, Italy)
Statistical Modeling of Sub-Pad Mechanical Properties Impact on Edge Removal Modulation in Copper CMP
10 Matthias Stender (ChEmpower Corporation, USA)
Advanced node process characterization: novel chemical mechanical polishing with environmentally friendly abrasive free setup
11 Oytun Tasgit (3D-Micromac AG, Germany)
Ultrafast Laser-Based Sample Preparation for Optimized FIB/SEM Workflows in High-Throughput Analysis
12 Roman Tschagaew (Institut für Angewandte Physik, TU Bergakademie Freiberg, Germany)
Towards a calibrated TCAD model of an AlGaN/GaN HEMT device
16/16
 
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