Stéphane Bernabé received the M.Sc. degree in Physics and Photonics engineering from the University Louis Pasteur of Strasbourg, France, in 1997. The same year, he graduated from the Ecole Nationale Supérieure de Physique de Strasbourg (ENSPS).
He has been R&D engineer and project leader in the field of optoelectronic packaging in companies Wavetek Wandel Goltermann (now Viavi), Radiall and Intexys Photonics, in charge of fiber optic module developments. In 2007 he joined the CEA-LETI Institute in Grenoble, France, in the Optics and Photonics Department, and has been involved in several research dealing with optoelectronic device packaging (Photonic Integrated Circuits, LED modules, components reliability, multiphysics modelling), and application of Silicon Photonics to Data communications and optical Networks on Chips (oNoC) for computing. He has been involved in several Europe and national funded R&D projects, pioneering Silicon Photonics in Europe. He is now heading the Photonics Packaging Lab at CEA-LETI, Grenoble, France.
Mr. Bernabé has published 60 papers, 17 patents, and co-authored 3 book chapters. His current interests are in Photonic/Electronic co-integration leveraging advanced packaging technologies, and PIC optical coupling. He is actively participating in ECTC and ESTC conference committees, and is a member of IEEE EPS.

Maurice Clair studied Mechanical Engineering at the University of Technology Chemnitz (Germany). He joined 3D-Micromac in 2005 as a development engineer and is now the team leader of the Technology and Innovation Management department. In his current role, he serves as the technical lead for ohmic contact formation on SiC (silicon carbide), a critical area for advancing semiconductor technologies.
Through his expertise in laser technologies, he has been instrumental in developing innovative laser micromachining processes, including laser trimming techniques for fine-tuning electronic components using both digital and analogue approaches, and beam shaping for ultra-short-pulsed lasers.

Claire Fenouillet-Béranger joined CEA-Leti, Grenoble, in 1998 where she carried out her PhD. work on the integration and characterization of SOI devices. From 2001 to 2013 she worked as a CEA-Leti assignee in advanced R&D STMicroelectronics center, Crolles, France on FD-SOI (Fully-depleted SOI) technology platform development and characterization. From 2013 to 2020 she worked as the project leader of the low temperature MOSFETs development for 3D sequential integration. From January 2020 to January 2022, she was the LETI SiC pilot line project manager in the frame of the joint development program between SOITEC & AMAT. She is the author and co-author of more than 200 publications in major conferences and journals and of more than 40 patents. She was the co-recipient of the Grand Prix du Général Ferrié in 2012 for her work on FD-SOI. She is in charge of CMOS patent portfolio. Since 2022, she is director of research, and CEA Fellow expert, and co-project manager of the FD-SOI next generation node integration at CEA-Leti.

Frank Fournel graduated from ESPCI (Paris) with a master in Materials Science, and got his PhD in 2001. He has been employed by CEA since 2001. He is now at the head of the wafer bonding technology engineering in LETI and board member of the international ECS Wafer Bonding Symposium conference, the International Wafer’Bond conference and the Low Temperature Bonding 3D conference. He has more than 231 international publications with an h-index of 29, 133 deposited patents. He passed his HDR in 2009. He his French Research Director since 2021. He is CEA Fellow since 2023

Tatsuya Funaki received the M.E. degree in engineering from Osaka University in 1997. He joined Murata Manufacturing Co., Ltd. in 1997. He also joined WOW alliance in Institute of Science Tokyo where he engaged in the research and development on process integration for WOW (Wafer on Wafer) and COW (Chip on Wafer). His research interests include micro bonding technology and assembly technology.

Dr. Himendra Jha is a senior scientist at MKS-Atotech, specializing in semiconductor metallization. He has received PhD from Hokkaido University, Japan in 2008. He worked in multiple scientific Institutions until he joined MKS Atotech in 2014. With over 15 years of experience in electrochemical materials science, he is a leading expert in the area of metallization for Cu bump, lead-free soldering, bond-pad as well as solar energy conversion and energy storage (Li-ion battery).

Alberto Mancaleoni started his professional experience with ST in 1993, after obtaining a master’s degree in Electronics at Universita’ degli Studi di Pisa. He has developed a technical career in the field of reliability, process and package qualification, degradation mechanisms study and failure risk prevention, mainly applied to the Automotive domain. He is Senior Member of ST Technical Staff since 2009, as expert of package-level reliability and Chip-Package Interaction. He is promoter and co-author of papers and publications around package interconnections reliability, and active in training and knowledge sharing initiatives. He currently operates in the Quality and Reliability organization of Analog, Power & Discrete, Mems and Sensors Group.

Alessandro Mapelli is a Microsystems Engineer at Confovis, where he focuses on adapting optical metrology and inspection solutions to the needs of the semiconductor industry.
He holds a Master’s degree in Microengineering (2005) and a PhD in Microsystems and Microelectronics (2011) from the École Polytechnique Fédérale de Lausanne (EPFL).
Before joining Confovis in 2022, he spent more than 15 years at CERN, where he led the development of advanced microfluidic cooling systems for pixel detectors and co-invented several patents in scintillation particle detection.
At Confovis, he is involved in defining performance validation protocols, developing technical content, and adapting Confovis’ technologies to advanced packaging, MEMS, and 3D integration applications.

Nicolas Posseme received an Engineer degree in Plasma in 2001 from Polytech Orleans, a Ph.D. degree in microelectronics in 2005 for his work on Low k film etching and a HDR degree in 2014. He joined the CEA-Leti in 2005. First, he joined ST Crolles as CEA-Leti assignee in etch R&D focused in the BEOL. In 2009, he joined IBM Alliance in Albany as Leti assignee to contribute to the development of FDSOI technology. Within Albany state of the art facilities, he worked on device integration to improve the performance of FDSOI devices. In 2011, he moved to AMAT in Sunnyvale as Leti assignee where he worked on the development of disruptive etch processes (FEOL and BEOL). Back in France in 2013, he was deputy head of etch and stripping lab. In 2016, he joined Global Foundries in Dresden as Leti assignee participating in the development of 22FDX and 12FDX technologies as etch and process integration expert. Back in France in 2019, he was head of etch and stripping lab as well as in charge of the engineering (etch and stripping) at Leti. Then he joined beginning 2023 ST Crolles as senior member of technical staff in R&D etch group. He is recently back at CEA-LETI as process integration expert for optical applications. Nicolas Posseme authored and co-authored over 100 papers and has filed 100 patents. He has also given more than 170 oral presentations at international conferences.

Danny Reuter received an Engineer degree in microelectronics in 2002 and a Ph.D. degree in microsystem technology in 2008 for his work on Thin film packaging of inertial sensors, both from University of technology Chemnitz. He joined Fraunhofer ENAS in 2008 as research assistent in Nanotechnology. In 2009, he joined the Center for Micro and Nanotechnology (ZfM) for Plasma etching and lithography. From 2011 to 2014 he coordinated the Nano System Integration network of competence between 9 reserach institutes from Fraunhofer Society, Leibniz Society and 3 Universities. In 2014, he became Head of the department lithography at the ZfM and at the same time Head of the group Nanolithography at Fraunhofer ENAS. In 2014 he co-founded the memsfab GmbH. In 2022 he became head of the department Nano Device Technologies at Fraunhofer ENAS. In 2024 he was appointed Deputy Director of the Center for Micro- and Nanotechnologies.
His research interests are in the fields of MEMS technologies and Heterointegration of Photonics, Quantum technologies and Beyond CMOS approaches also with respect to sustainable manufacturing.

Tommaso Rollo studied nanoelectronics at the University of Udine (IT), where in 2019 he received his Ph.D. with a thesis about the modeling and simulation of ferroelectric materials for logic applications. During his research fellowship he extended his competences about modeling and simulation of exotic materials for advanced electronics. He later joined the industry, building expertise in nanofabrication and lithography techniques, finally landing in 2021 at Applied Materials. Here he’s currently working for the System-to-Materials group, focusing on the material-to-device cooptimization process for advanced nodes, bridging material’s fabrication and device performance prediction.

I received a master´s degree in Nanosciences and Nanotechnologies, specializing in Nano-engineering and Quantum Devices, in 2023. I joined STMicroelectronics the same year as an intern to validate my master’s degree. I then proposed to work on eco-design methodology as an apprentice while preparing a specialized master’s in Circular Economy and Sustainable Organization. I am now at the beginning of my second year as a PhD student in technology R&D team, working on “Quantifying environmental impacts of semiconductor manufacturing processes and technologies for ecodesign” in partnership with CEA LETI and the Industrial Engineering Laboratory GSCOP.

Jean‑Philippe Soulié joined imec (Leuven, Belgium) in 2019, where he specializes in advanced interconnect materials and thin‑film engineering for next‑generation semiconductor technologies. His recent work focuses on novel metallic and oxide materials that enable continued interconnect scaling beyond conventional metals. He has also contributed to the development and benchmarking of alternative interconnect solutions, including Ru‑based schemes and aluminide compounds (Ni-Al, Cu-Al), and to the exploration of epitaxial metal and oxide layers as promising building blocks for emerging metallization approaches.

Davide Tierno obtained a B.Sc. in Electronic Engineering from Politecnico di Torino and an M.Sc. in Nanotechnologies for ICTs from Politecnico di Torino and INP Grenoble. He received his Ph.D. in Materials Engineering from KU Leuven in 2018, with research focused on the fabrication and characterization of spintronic devices at imec. He then joined imec as a Researcher in 2019, developing expertise in BEOL interconnect reliability and performance, including failure mechanism analysis, advanced metallization schemes, and interconnect characterization for cryogenic applications. In 2025, he transitioned to the BEOL Integration team, focusing on the development of novel process integration approaches for next-generation

Klaus Vogel studied mechanical engineering at the University of Technology Chemnitz (Germany). He joined the Fraunhofer Institute for Electronic Nano Systems – ENAS as development engineer in 2011 and is now team leader of the “Innovative Bonding and Deposition Technologies” group in the department System Packaging.
He has been R&D engineer and project leader in the field of low temperature bonding with special focus on integrated reactive material systems. Developing integrated reactive material systems by physical vapor deposition (CuO/Al, Al/Pd) and electroplating (Pd/Sn) as heat source for wafer-, chip- and component level bonding his current research addresses the combination of reactive bonding with inductive annealing.